Metal oxides of Zr, Hf, La, Y and Al are being investigated as possible candidates to replace SiO2 as a gate dielectric in complementary metal-oxide-semiconductor (CMOS) devices, in part because the higher dielectric constant, k, of these oxides allows the dielectric thickness to be scaled to below 1 nm EOT (equivalent oxide thickness). With current process practices, the gate dielectric is deposited at an early stage of processing and is subsequently subjected to thermal treatments at temperatures of 1000° C. or higher, depending on application and device type.
Metal oxides such as Al2O3 can undergo phase modifications during these thermal treatments that render the material impossible to etch in commonly used wet chemical etching mixtures such as aqueous HF (hydrofluoric acid). However, these metal oxides must be etched if electrical contact is to be made to underlying layers, for example to the source and drain areas of field effect transistor (FET) devices in CMOS circuits. While reactive ion etching (RIE) is a possible alternative to wet chemical etching, it is not preferred in these critical processes due to the danger of overetching into underlying device layers.
Thicker (10-100 nm) high-k metal oxides are also being investigated as possible candidates to replace SiO2 as the capacitor dielectric in thin film metal-insulator-metal capacitors (MIMCAPs) to provide a higher capacitance density. In this case, contact openings to the bottom capacitor electrode are typically formed by etching the metal oxide using the pattern of the top electrode as a mask. Again, wet patterning would often be preferred to RIE due to concerns about overetching into the bottom electrode and redeposition of sputtered bottom electrode material (which may cause shorts between the bottom and top electrodes).
Ion implantation has long been known to increase the etch rate of SiO2. This effect is discussed in a recent paper by L. Liu et al (“HF wet etching of oxide after ion implantation,” Proceedings 1996 IEEE Hong Kong Electron Devices Meeting, Jun. 29, 1996), and has provided the basis for several patents on patterning SiO2 (see for example, K. C. Jain et al., U.S. Pat. No. 4,652,334 issued Mar. 24, 1987 and entitled “Method for Patterning Silicon Dioxide with High Resolution in Three Dimensions”). However, this effect has not been previously exploited for the etching and patterning of chemically inert metal oxide films, a particularly important case, since so many of these films are impossible to etch without ion-induced damage.
It would thus be highly desirable to provide a system and method for patterning chemically inert and/or high temperature-treated metal oxide films in which selected areas of such films could be made to become susceptible to the conventional wet etch solutions.